Publications

Below is the current complete list of publications (over 130 papers) and patents. Each category is in reverse chronological order. For papers in a specific area, click on the correponding button to the right.

Awarded Patents

  1. Systems and Methods for Proactive Surge Protection. United States Patent 7,860,004. Issued in December 2010.

  2. Method and Apparatus for Scan Block Caching. United States Patent 7,672,005. Issued in March 2010.

  3. Design Environment and a Design Method for Hardware/Software Co-Design. United States Patent 5,870,588. Issued in February 1999.

  4. System and Method for Generating a Hazard-Free Asynchronous Circuit. United States Patent 5,748,487. Issued in May 1998.

Journals

  1. Hao Wang and Bill Lin, "Per-flow Queue Management with Succinct Priority Indexing Structures for High Speed Packet Scheduling," IEEE Transactions on Parallel and Distributed Systems, accepted on Jul 26, 2012. [paper]

  2. Guang Sun, Chia-Wei Chang, and Bill Lin, "A New Worst-Case Throughput Bound for Oblivious Routing in Odd Radix Mesh Network," IEEE Computer Architecture Letters, accepted on March 25, 2012. Date of IEEE digital library publication: April 17, 2012. [paper]

  3. Guanyao Huang, Chia-Wei Chang, Chen-Nee Chuah and Bill Lin, "Measurement-Aware Monitor Placement and Routing: A Joint Optimization Approach for Network-Wide Measurements," IEEE Transactions on Network and Service Management (TNSM), vol. 9, no. 1, March 2012, pp. 48-59. [paper]

  4. Rohit Sunkam Ramanujam and Bill Lin, "Randomized Throughput-Optimal Oblivious Routing for Torus Networks," IEEE Transactions on Computers (TC), accepted on November 4, 2011. Date of IEEE digital library publication: November 29, 2011. [paper]

  5. Rohit Sunkam Ramanujam and Bill Lin, "Randomized Partially-Minimal Routing: Near-Optimal Oblivious Routing for 3D Mesh Networks," IEEE Transactions on VLSI (TVLSI), vol. 9, no. 11, November 2012, pp. 2080-2093, accepted on August 12, 2011. Date of IEEE digital library publication: November 24, 2011. [paper]

  6. Hao Wang, Haiquan (Chuck) Zhao, Bill Lin, and Jun (Jim) Xu, "DRAM-Based Statistics Counter Array Architecture with Performance Guarantee," IEEE/ACM Transactions on Networking (ToN), accepted on October 2, 2011. Date of ACM/IEEE digital library publication: October 20, 2011. [paper]

  7. Hao Wang, Haiquan (Chuck) Zhao, Bill Lin, and Jun (Jim) Xu, "Robust Pipelined Memory System with Worst Case Performance Guarantee," IEEE Transactions on Computers (TC), accepted on August 22, 2011. Date of IEEE digital library publication: August 31, 2011. [paper]

  8. Nan Hua, Bill Lin, Jun Xu, Haiquan Zhao, "BRICK: A Novel Exact Active Statistics Counter Architecture," IEEE/ACM Transactions on Networking, vol. 19, no. 3, June 2011, pp. 670-682. [paper]

  9. Rohit Sunkam Ramanujam, Vassos Soteriou, Bill Lin, Li-Shiuan Peh, "Extending the Effective Throughput of NoCs with Distributed Shared-Buffer Routers," IEEE Transactions on Computer-Aided Design, vol. 30, no. 4, April 2011, pp. 548-561. [paper]

  10. Kwangok Jeong, Andrew B. Kahng; Bill Lin, Kambiz Samadi, "Accurate Machine-Learning-Based On-Chip Router Modeling," IEEE Embedded Systems Letters, vol. 2, no. 3, September 2010, pp. 62-66. [paper]

  11. Bill Lin, Isaac Keslassy, "The Concurrent Matching Switch Architecture," IEEE/ACM Transactions on Networking, vol. 18, no. 4, August 2010, pp. 1330 - 1343. [paper]

  12. Jerry Chou, Bill Lin, "Birkhoff-von Neumann Switching with Statistical Traffic Profiles," Computer Communications, vol. 33 no. 7, May 2010, pp. 848-851. [paper]

  13. Chia-Wei Chang, Seungjoon Lee, Bill Lin, Jia Wang, "The Taming of the Shrew: Mitigating Low-Rate TCP Targeted Attack," IEEE Transactions on Network and Service Management, vol. 7 no. 1, March 2010, pp. 1-13. [paper]

  14. Michael Tartre, Bill Lin, "Frame-based Multicast Switching," IEEE Communications Letters, vol. 14 no. 3, March 2010, pp. 251-253. [paper]

  15. Bill Lin, Isaac Keslassy, "The Interleaved Matching Switch Architecture," IEEE Transactions on Communications, vol. 57, no. 12, December 2009. [paper]

  16. Jerry C. Chou, Bill Lin, Subhabrata Sen, Oliver Spatscheck, "Proactive Surge Protection: A Defense Mechanism for Bandwidth-Based Attacks," IEEE/ACM Transactions on Networking, vol. 17, no. 6, December 2009. [paper]

  17. Shan Yan, Bill Lin, "Joint Multicast Routing and Network Design Optimization for Networks-on-Chip," IET Computers & Digital Techniques, vol. 3, no. 5, September 2009, pp. 443-459. [paper]

  18. Rohit Sunkam Ramanujam, Bill Lin, "A Layer-Multiplexed 3D On-Chip Network Architecture," IEEE Embedded Systems Letters, vol. 1, no. 2, August 2009, pp. 50-55. [paper]

  19. Vassos Soteriou, Rohit Sunkam Ramanujam, Blll Lin, Li-Shiuan Peh, "A High-Throughput Distributed Shared-Buffer NoC Router," IEEE Computer Architecture Letters, vol. 8, no. 1, April 2009. [paper]

  20. Shan Yan, Bill Lin, "Custom Networks-on-Chip Architectures with Multicast Routing," IEEE Transactions on VLSI Systems, vol. 17, no. 3, March 2009. [paper]

  21. Rohit Sunkam Ramanujam, Blll Lin, "Weighted Random Routing on Torus Networks," IEEE Computer Architecture Letters, vol. 8, no. 1, January 2009. [paper]

  22. Jerry Chou, Bill Lin, "Coarse Circuit Switching by Default, Re-Routing Over Circuits for Adaptation," Journal of Optical Networking, vol. 8, no. 1, pp. 33-50, January 2009. [paper]

  23. Chia-Wei Chang, Bill Lin, "A Simple Mechanism for Throttling High-Bandwidth Flows," Research Letters in Communications, Volume 2008 (2008), Article ID 516240. [paper]

  24. Shan Yan, Bill Lin, "Stream Execution on Embedded Wide-Issue Clustered VLIW Architectures," EURASIP Journal of Embedded Systems, Volume 2008 (2008), Article ID 516240.

  25. Bill Lin, Jun Xu, "DRAM is Plenty Fast for Wirespeed Statistics Counting," ACM Performance Evaluation Review, vol. 36, no. 2, pp. 45-50, September 2008. [paper]

  26. Rohit Sunkam Ramanujam, Bill Lin, "Randomized Partially-Minimal Routing on Three-Dimensional Mesh Networks," IEEE Computer Architecture Letters, vol. 7, no. 2, pp. 37-40, July 2008. [paper]

  27. Bill Lin, "Compiling Concurrent Programs for Embedded Sequential Execution," Integration: the VLSI Journal, Elsevier Press, vol. 40, no. 2, pp. 106-117, February 2007.

  28. Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Gjalt de Jong, Bill Lin, Diederik Verkest, Francky Catthoor, "System Specification for Applications with Dynamic Data Storage and Intensive Data Transfer," SBmicro Journal of Solid State Devices and Circuits. pp. 24-31, January 1999.

  29. Kenneth Yun, Bill Lin, David Dill, Srinivas Devadas, "Performance-driven Synthesis of Asynchronous Controllers," IEEE Transactions on Computer-Aided Design, vol. 17, no. 9, September 1998. [paper]

  30. Milton Sawasaki, Chantal Ykman, Bill Lin, "Externally Hazard-Free Implementations of Asynchronous Control Circuits," IEEE Transactions on Computer-Aided Design, vol. 16, no. 6, August 1997. [paper]

  31. Steven Vercauteren, Bill Lin, "Hardware/Software Communication and System Integration for Embedded Architectures," Design Automation for Embedded Systems, (Kluwer Journal Press), vol. 2, no. 3/4, May 1997.

  32. Hugo De Man, Ivo Bolsens, Bill Lin, Karl Van Rompaey, Steven Vercauteren, Diederik Verkest, "Hardware-Software Codesign of Digital Telecommunication Systems," Proceedings of the IEEE, vol. 85, (no.3):391-418, March 1997. [paper]

  33. Chi-Ying Tsui, Jose Monteiro, Massoud Pedram, Alvin M. Despain, Srinivas Devadas, Bill Lin, "Power Estimation Methods for Sequential Logic Circuits," IEEE Transactions on VLSI Systems, vol. 3, no. 3, pp. 404-416, September 1995. (Best Journal Paper Award). [paper]

  34. Bill Lin, Srinivas Devadas, "Synthesis of Hazard-Free Multi-Level Logic Implementations under Multiple-Input Changes from Binary Decision Diagrams," IEEE Transactions on Computer-Aided Design, vol. 14, (no.8):974-985, August 1995. [paper]

  35. Steven Vercauteren, Bill Lin, Hugo De Man, "A High-Level Asynchronous Compiler for System Interface Modules," DSP Applications Journal, 1994.

  36. Peter Vanbekbergen, Gert Goossens, Bill Lin, Hugo De Man, "A Generalised State Assignment Theory for Transformations on Signal Transition Graphs," Journal on VLSI Signal Processing, (Kluwer Academic Press), vol. 7, (no.1-2):101-115, February 1994. [paper]

  37. Takayasu Sakurai, Bill Lin, A. Richard Newton, "Fast Simulated Diffusion: An Optimization Algorithm for Multi-Minimum Problems and Application to MOSFET Parameter Extraction," IEEE Transactions on Computer-Aided Design, vol. 11, (no.2):228-234, February 1992.

  38. Xuejun Du, Gary D. Hachtel, Bill Lin, A. Richard Newton, "MUSE: A Multi-level State Encoding Algorithm for State Assignment," IEEE Transactions on Computer-Aided Design, vol. 10, (no.1):28-38, January 1991.

  39. Bill Lin, A. Richard Newton, "A Circuit Disassembly Technique for Synthesizing Symbolic Layouts from Mask Descriptions," IEEE Transactions on Computer-Aided Design, vol. 9, (no.9):959-969, September 1990.

Peer-Reviewed Conference and Symposium Proceedings

  1. Andrew B. Kahng, Bill Lin, Siddhartha Nath, "Enhanced Metamodeling Techniques for High-Dimensional IC Design Estimation Problems," Design Automation and Test in Europe (DATE) Conference, March 2013. [paper] [slides]

  2. Guang Sun, Chia-Wei Chang, Bill Lin, and Lieguang Zeng, "Oblivious Routing Design for Mesh Networks to Achieve a New Worst-Case Throughput Bound," International Conference on Computer Design (ICCD), Montreal, Canada, September 30-October 3, 2012, pp. 427-432. [paper] [slides]

  3. Andrew B. Kahng, Bill Lin, and Siddhartha Nath, "Explicit Modeling of Control and Data for Improved NoC Router Estimation," The 49th ACM/EDAC/IEEE Design Automation Conference (DAC) (Best Paper Award Nomination), San Francisco, June 3-7, 2012. [paper] [slides]

  4. Guang Sun, Shih-Hung Weng, Chung-Kuan Cheng, Bill Lin, and Lieguang Zeng, "An On-Chip Global Broadcast Network Design with Equalized Transmission Lines in the 1024-Core Era," The 14th International Workshop of System Level Interconnect Prediction (SLIP), San Francisco, California, June 3, 2012. [paper] [slides]

  5. Chia-Wei Chang, Han Liu, Guanyao Huang, Bill Lin and Chen-Nee Chuah, "Distributed Measurement-Aware Routing: Striking a Balance Between Measurement and Traffic Engineering," IEEE INFOCOM, Orlando, FL, March 25-30, 2012. [paper]

  6. Chia-Wei Chang, Guanyao Huang, Bill Lin and Chen-Nee Chuah, "LEISURE: A Framework For Load-Balanced Network-Wide Traffic Measurements," ACM/IEEE Symposium on Architectures for Networking and Communication Systems (ANCS), Brooklyn, NY, October 3-4, 2011. [paper]

  7. Hao Wang and Bill Lin, "Per-flow Queue Scheduling with Pipelined Counting Priority Index," IEEE Symposium on High-Performance Interconnects (HOTI), Santa Clara, CA, August 24-26, 2011. [paper]

  8. Hao Wang and Bill Lin, "Designing Efficient Codes for Synchronization Error Channels," ACM/IEEE International Workshop on Quality of Service (IWQoS), San Jose, CA, June 5-7, 2011. [paper]

  9. Andrew Kahng, Bill Lin, Kambiz Samadi, Rohit Sunkam Ramanujam, "Efficient Trace-Driven Metaheuristics for Optimization of Networks-on-Chip Configurations," IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, November 2010. [paper]

  10. Rohit Sunkam Ramaujam, Bill Lin, "Destination-based Adaptive Routing on 2D Mesh Networks," ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Princeton, NJ, October 25-26, 2010. [paper] [slides]

  11. Andrew Kahng, Bill Lin, Kambiz Samadi, Rohit Sunkam Ramanujam, "Trace-Driven Optimization of Network-on-Chip Configurations," ACM/IEEE Design Automation Conference, Anaheim, CA, June 2010. [paper]

  12. Hao Wang, Bill Lin, "Block-Based Packet Buffer with Deterministic Packet Departures," 11th International Conference on High Performance Switching (HPSR), Dallas, TX, June 13-16, 2010. [paper] [slides]

  13. Rohit Sunkam Ramanujam, Vassos Soteriou, Bill Lin, Li-Shiuan Peh, "Design of a High-Throughput Distributed Shared-Buffer NoC Router," The 4th ACM/IEEE International Symposium on Networks-on-Chip (NOCS), May 3-6, 2010, Grenoble, France. [paper] [slides]

  14. Chia-Wei Chang, Bill Lin, Alexandre Gerber, Subhabrata Sen, Oliver Spatscheck, "Network DVR: A Programmable Framework for Application-Aware Trace Collection," Passive and Active Measurement Conference (PAM), Zurich, Switzerland, April 7-9, 2010. [paper] [slides]

  15. Hao Wang, Haiquan (Chuck) Zhao, Bill Lin, Jun (Jim) Xu, "Design and Analysis of a Robust Pipelined Memory System," IEEE INFOCOM, San Diego, CA, March 15-19, 2010. [paper] [slides]

  16. Jerry Chou, Bill Lin, "Adaptive Re-Routing Over Circuits: An Architecture for an Optical Backbone," IEEE INFOCOM, San Diego, CA, March 15-19, 2010. [paper]

  17. Andrew B. Kahng, Bill Lin, Kambiz Samadi, "Improved On-Chip Router Analytical Power and Area Modeling," 15th Asia and South Pacific Design Automation Conference (ASP-DAC), January 18-21 2010, pp. 241-246. [paper] [slides]

  18. Haiquan Zhao, Hao Wang, Bill Lin, Jun Xu, "Design and Performance Analysis of a DRAM-based Statistics Counter Array Architecture," ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Princeton, NJ, October 19-20, 2009. [paper] [slides]

  19. Rohit Sunkam Ramanujam, Bill Lin, "A Novel 3D Layer-Multiplexed On-Chip Network," ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Princeton, NJ, October 19-20, 2009. [paper] [slides]

  20. Rohit Sunkam Ramanujam, Bill Lin, "Weighted Random Oblivious Routing on Torus Networks," ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Princeton, NJ, October 19-20, 2009. [paper] [slides]

  21. Hao Wang, Bill Lin, "A Block-Based Reservation Architecture for the Implementation of Large Packet Buffers," ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Princeton, NJ, October 19-20, 2009. [paper]

  22. Jerry Chou, Bill Lin, "Optimal Multi-Path Routing and Bandwidth Allocation under Utility Max-Min Fairness," IEEE International Workshop on Quality of Service (IWQoS), Charleston, SC, July 13-15, 2009. [paper] [slides]

  23. Hao Wang, Bill Lin, "Succinct Priority Indexing Structures for the Management of Large Priority Queues," IEEE International Workshop on Quality of Service (IWQoS), Charleston, SC, July 13-15, 2009. [paper] [slides]

  24. Chia-Wei Chang, Seungjoon Lee, Bill Lin, Jia Wang, "The Taming of The Shrew: Mitigating Low-Rate TCP-Targeted Attack," International Conference on Distributed Computing Systems (ICDCS), Montreal, Quebec, Canada, June 22-26, 2009. [paper] [slides]

  25. Bill Lin, Jun Xu, Nan Hua, Hao Wang, Haiquan Zhao, "A Randomized Interleaved DRAM Architecture for the Maintenance of Exact Statistics Counters," ACM SIGMETRICS, Seattle, WA June 15-19, 2009. [paper]

  26. Nan Hua, Bill Lin, Jun Xu, Haiquan Zhao, "BRICK: A Novel Exact Active Statistics Counter Architecture," ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), November 2008, pp. 89-98. [paper] [slides]

  27. Nan Hua, Haiquan Zhao, Bill Lin, Jun Xu, "Rank-Indexed Hashing: A Compact Construction of Bloom Filters and Variants," IEEE Conference on Network Protocols (ICNP), October 2008, pp. 73-82. [paper]

  28. Shan Yan, Bill Lin, "Design of Application-Specific 3D Networks-on-Chip Architectures," IEEE Conference on Computer Design (ICCD), October 2008, pp. 142-149. [paper]

  29. Rohit Sunkam Ramanujam, Bill Lin, "Near-Optimal Oblivious Routing on Three-Dimensional Mesh Networks," IEEE Conference on Computer Design (ICCD), October 2008, pp. 134-141. [paper] [slides]

  30. Jerry Chou, Bill Lin, Subhabrata Sen, Oliver Spatscheck, "Proactive Surge Protection: A Defense Mechanism for Bandwidth-Based Attacks," 17th Usenix Security Symposium, San Jose, CA, July 28-August 1, 2008. [paper] [slides]

  31. Shan Yan, Bill Lin, "Application-Specific Network-on-Chip Architecture Synthesis based on Set Partitions and Steiner Trees," 13th Asia and South Pacific Design Automation Conference (ASP-DAC), Seoul, Korea, January 21-24, 2008, pp. 277-282. [paper]

  32. Bill Lin, Isaac Keslassy, "Frame-Aggregated Concurrent Matching Switch," ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Orlando, FL, December 3-4, 2007, pp. 107-116. [paper] [slides]

  33. Jerry Chou, Bill Lin, Subhabrata Sen, Oliver Spatscheck, "Minimizing Collateral Damage by Proactive Surge Protection," ACM SIGCOMM 2007 Workshop on Large-Scale Attack Defense (LSAD), Kyoto, Japan, August 27, 2007, pp. 97-104. [paper] [slides]

  34. Shan Yan, Bill Lin "Stream Execution of Wide-Issue Clustered VLIW Architectures," ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), San Diego, CA, June 13-15, 2007, pp. 158-160.

  35. Hao Wang, Bill Lin, "Pipelined van Emde Boas Tree: Algorithms, Analysis, and Applications," IEEE INFOCOM, Anchorage, AK, May 7-11, 2007, pp. 2471-2475. [paper] [slides]

  36. Hao Wang, Bill Lin, "On the Efficient Implementation of Pipelined Heaps for Network Processing," IEEE Global Communications Conference (Globecom'06), November 27-December 1, 2006. [paper] [slides]

  37. Mayank Kabra, Siddhartha Saha, Bill Lin, "Fast Buffer Memory with Deterministic Packet Departures," IEEE Hot Interconnects XIV, Stanford, CA, August 23-25, 2006, pp. 67-72. [paper] [slides]

  38. Bill Lin, Isaac Keslassy, "The Concurrent Matching Switch Architecture," IEEE INFOCOM, Barcelona, Spain, April 2006. [paper] [slides]

  39. Bill Lin, "A Simple Rate Quantization Method for Service Guarantees with Input-Queued Switches," 43rd Annual Allerton Conference on Communication, Control, and Computing, Monticello, IL, September 28-30, 2005.

  40. Bill Lin, Isaac Keslassy, "A Scalable Switch for Service Guarantees," IEEE Hot Interconnects XIII, Stanford, CA, August 2005, pp. 93-99. [paper] [slides]

  41. Stefano Santi, Bill Lin, Ljupco Kocarev, Gian Mario Maggio, Riccardo Rovatti, Gianluca Setti, "On the Impact of Traffic Statistics on Quality of Service for Networks on Chip," IEEE International Symposium on Circuits and Systems (ISCAS'05), Kobe, Japan, May, 2005. [paper]

  42. Michael Roeder, Bill Lin, "Maintaining Exact Statistics Counters with a Multi-Level Counter Memory," IEEE Global Communications Conference (Globecom'04), Dallas, Texas, vol. 2, pp. 576-581, November, 2004.

  43. Ranjita Bhagwan, Bill Lin, "Design of a High-Speed Packet Switch for Fine-Grained Quality-of-Service Guarantees," IEEE International Conference on Communications (ICC'00), New Orleans, vol. 3, pp. 1430-1434, June 2000.

  44. Ranjita Bhagwan, Bill Lin, "Fast and Scalable Priority Queue Architecture for High-Speed Network Switches," IEEE INFOCOM, Tel Aviv, vol. 2, pp. 538-547, March 2000. [paper]

  45. Bryan Talbot, Timothy Sherwood, Bill Lin, "IP Caching for Terabit Speed Routers," IEEE Global Communications Conference (Globecom'99), Rio de Janeiro, Brazil, vol. 2, pp. 1565-1569, December, 1999.

  46. Xiaohan Zhu, Bill Lin, "Compositional Software Synthesis of Communicating Processes", International Conference on Computer Design, pp. 646-651, October 1999.

  47. James Hurt, Andrew May, Xiaohan Zhu, Bill Lin, "Design and Implementation of High-Speed Symmetric Crossbar Schedulers," IEEE International Conference on Communications (ICC'99), Vancouver, pp. 253-258, June, 1999.

  48. Xiaohan Zhu, Bill Lin, "Hardware Compilation for FPGA-based Configurable Computing Machines," ACM/IEEE Design Automation Conference, New Orleans, LA, pp. 697-702, June 1999.

  49. Bill Lin, "Design Technology for Embedded Computing," The 5th Asia Pacific Conference on Hardware Description Languages (Invited Paper), pp. 502-505, June 1998.

  50. Bill Lin, "Software Synthesis of Process-Based Concurrent Programs," ACM/IEEE Design Automation Conference, pp. 502-505, June 1998.

  51. Bill Lin, "Efficient Compilation of Process-Based Concurrent Programs without Run-Time Scheduling," Design Automation and Test in Europe Conference, February 1998.

  52. Steven Vercauteren, Diederik Verkest, Gjalt de Jong, Bill Lin, "Efficient Verification using Generalized Partial Order Analysis," Design Automation and Test in Europe Conference (Best Paper Award Nomination), February 1998.

  53. Steven Vercauteren, Diederik Verkest, Gjalt de Jong, Bill Lin, "Derivation of Formal Representations from Process-based Specification and Implementation Models," IEEE International Symposium on System Synthesis, pp. 16-23, September 1997.

  54. Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Gjalt de Jong, Bill Lin, Hugo De Man, "A System Design Methodology for Telecommunication Network Applications," The Seventh Great Lakes Symposium on VLSI, p. 64-69, March 1997.

  55. Sven Wuytack, Francky Catthoor, Gjalt De Jong, Bill Lin, Hugo De Man, "Flow Graph Balancing for Minimizing the Required Memory Bandwidth," IEEE International Symposium on System Synthesis, p. 127-132, November 1996.

  56. Bill Lin, Karl Van Rompaey, Steven Vercauteren, Diederik Verkest, Ivo Bolsens, Hugo De Man, "Designing Single-Chip Systems," The 2nd International Conference on ASIC (Invited Paper), p. T6-11, October 1996.

  57. Eric Verlind, Gjalt De Jong, Bill Lin, "Efficient Partial Enumeration for Timing Analysis of Asynchronous Systems," ACM/IEEE Design Automation Conference, p. 55-58, June 1996.

  58. Tilman Kolks, Steven Vercauteren, Bill Lin, "Control Resynthesis for Control-Dominated Asynchronous Designs," International Symposium on Advanced Research in Asynchronous Circuits and Systems, p. 233-243, March 1996.

  59. Steven Vercauteren, Bill Lin, Hugo De Man, "Constructing Application-Specific Heterogeneous Embedded Architectures for Custom HW/SW Applications," ACM/IEEE Design Automation Conference, p. 521-526, June 1996.

  60. Steven Vercauteren, Bill Lin, Hugo De Man, "A Strategy for Real-Time Kernel Support in Application-Specific HW/SW Embedded Architectures," ACM/IEEE Design Automation Conference, p. 678-683, June 1996.

  61. Bill Lin, "A System Design Methodology for Software/Hardware Co-Development of Telecommunication Network Applications," ACM/IEEE Design Automation Conference, p. 672-677, June 1996.

  62. Bill Lin, "System Design Tools for Broadband Telecom Network Applications," European Design and Test Conference, p. 23-26, March 1996.

  63. Bill Lin, Steven Vercauteren, Hugo De Man, "Embedded Architecture Co-Synthesis and System Integration," International Workshop on Hardware/Software Codesign, p. 2-9, March 1996.

  64. Robert M. Fuhrer, Bill Lin, Steven M. Nowick. "Symbolic Hazard-Free Minimization and Encoding of Asynchronous Finite State Machines," IEEE International Conference on Computer-Aided Design, p. 604-611, November 1995.

  65. Eric Verlind, Gjalt De Jong, Bill Lin, "Efficient Timing Analysis of Highly Concurrent Systems," ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, p. 282-293, November 1995.

  66. Bill Lin, Gjalt De Jong, Carl Verdonck, Sven Wuytack, Francky Catthoor, "Background Memory Management for Dynamic Data Structures Intensive Processing Systems," IEEE International Conference on Computer-Aided Design, p. 515-520, November 1995.

  67. Chantal Ykman, Bill Lin. "Efficient State Assignment Framework for Asynchronous State Graphs," International Conference on Computer Design, p. 692-697, October 1995.

  68. Milton Sawasaki, Chantal Ykman, Bill Lin. "Externally Hazard-Free Implementations of Asynchronous Control Circuits," ACM/IEEE Design Automation Conference, p. 718-724, June 1995.

  69. Hugo De Man, Ivo Bolsens, Bill Lin, Karl Van Rompaey, Steven Vercauteren, Diederik Verkest, "Co-Design of DSP Systems," NATO Advanced Study Institute Workshop on Hardware/Software Codesign, Lake Como, Italy, June 1995.

  70. Bill Lin, Gjalt de Jong, Tilman Kolks. "Hierarchical Optimization of Asynchronous Circuits," ACM/IEEE Design Automation Conference, p. 712-717, June 1995.

  71. Robert M. Fuhrer, Bill Lin, Steven M. Nowick. "Symbolic Hazard-Free Minimization and Encoding of Asynchronous Finite State Machines," International Workshop on Logic Synthesis, Lake Tahoe, CA, May 1995.

  72. Chantal Ykman, Bill Lin. "Optimized State Assignment for Asynchronous Control Circuits," 2nd Working Conference on Asynchronous Design Methodologies, p. 118-127, May 1995.

  73. Robert M. Fuhrer, Bill Lin, Steven M. Nowick. "Algorithms for the Optimal State Assignment of Asynchronous State Machines," Advanced Research in VLSI, Chapel-Hill, NC, p. 59-75, March 1995.

  74. Bill Lin, Gjalt de Jong, Tilman Kolks. "Modeling and Optimization of Hierarchical Synchronous Circuits," European Design and Test Conference, p. 144-149, February 1995.

  75. Kenneth Yun, Bill Lin, David Dill, Srinivas Devadas, "Performance-driven Synthesis of Asynchronous Controllers," IEEE International Conference on Computer-Aided Design, p. 550-557, November 1994.

  76. Gert Goossens, Ivo Bolsens, Bill Lin, Francky Catthoor, "Design of Heterogeneous ICs for Mobile and Personal Communication Systems," IEEE International Conference on Computer-Aided Design (Invited Paper), p. 524-531, November 1994. [paper]

  77. Bill Lin, Steven Vercauteren, "Synthesis of Concurrent System Interface Modules with Automatic Protocol Conversion Generation," IEEE International Conference on Computer-Aided Design, p. 101-108, November 1994.

  78. Bill Lin, Srinivas Devadas, "Synthesis of Hazard-Free Multi-Level Logic Implementations under Multiple-Input Changes from Binary Decision Diagrams," IEEE International Conference on Computer-Aided Design, p. 542-549, November 1994.

  79. Peter Vanbekbergen, Gert Goossens, Bill Lin, "Modeling and Synthesis of Timed Asynchronous Circuits," European Design Automation Conference (EuroDAC), p. 460-465, September 1994.

  80. Bill Lin, Chantal Ykman-Couvreur, Peter Vanbekbergen, "A General State Graph Transformation Framework for Asynchronous Synthesis," European Design Automation Conference (EuroDAC), p. 448-453, September 1994.

  81. Jose Monteiro, Srinivas Devadas, Bill Lin, "Estimation of Switching Activity in Sequential Logic Circuits with Applications to Synthesis for Low Power," ACM/IEEE Design Automation Conference, p. 12-17, June 1994.

  82. Gjalt De Jong, Bill Lin, "A Communicating Petri Net Model for the Design of Concurrent Asynchronous Modules," ACM/IEEE Design Automation Conference (Best Paper Award Nomination), p. 49-55, June 1994.

  83. Eric Verlind, Tilman Kolks, Gjalt De Jong, Bill Lin, Hugo De Man, "A Time Abstraction Method for Efficient Verification of Communicating Systems," ACM/IEEE Design Automation Conference, p. 609-614, June 1994.

  84. Alex Kondratyev, Michael Kishinevsky, Bill Lin, Peter Vanbekbergen, and Alexander Yakovlev, "Basic Gate Implementation of Speed-Independent Circuits," ACM/IEEE Design Automation Conference, p. 56-62, June 1994.

  85. Jose Monteiro, Srinivas Devadas, Bill Lin, Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain, "Exact and Approximate Methods of Switching Activity Estimation in Sequential Logic Circuits," IEEE Workshop on Low-Power, p. 117-122, April 1994.

  86. Peter Vanbekbergen, Chantal Ykman-Couvreur, Bill Lin, Hugo De Man, "A Generalised Signal Transition Graph Model for Specification of Complex System-Level Interfaces" European Design and Test Conference, Paris, France, p. 378-384, February 1994.

  87. Tilman Kolks, Bill Lin, Hugo De Man, "Sizing and Verification of Communication Buffers for Communicating Processes," IEEE International Conference on Computer-Aided Design, Santa Clara, CA, p. 660-664, November 1993.

  88. Tilman Kolks, Bill Lin, Hugo De Man, "Sizing of Communication Buffers for Communicating Signal Processors," IEEE Workshop on VLSI Signal Processing, Veldhoven, The Netherlands, p. 426-434, October 1993.

  89. Bill Lin, "Efficient Symbolic Support Manipulation," International Conference on Computer Design, Cambridge, MA, p. 513-516, October 1993.

  90. Bill Lin, Hugo De Man, "Low-Power Driven Technology Mapping under Timing Constraints," International Conference on Computer Design, Cambridge, MA, p. 421-427, October 1993.

  91. Peter Vanbekbergen, Gert Goossens, Bill Lin, "Relational and Timing Semantics for a Timed Signal Transition Graph Model," ACM International Workshop on Timing Issues in Specification, Synthesis, and Analysis of Digital Systems, Malente, Germany, September 1993.

  92. Milton Sawasaki, Bill Lin, Hugo De Man, "A Relational System and the Modeling of Metastability and its Effects in Signal Synchronization," ACM International Workshop on Timing Issues in Specification, Synthesis, and Analysis of Digital Systems, Malente, Germany, September 1993.

  93. Bill Lin, Chantal Ykman-Couvreur, "Synthesis of Burst-Mode and Asynchronous Finite State Machines at the State Graph Level," ACM International Workshop on Timing Issues in Specification, Synthesis, and Analysis of Digital Systems, Malente, Germany, September 1993.

  94. Alex Kondratyev, Michael Kishinevsky, Bill Lin, Peter Vanbekbergen, Alexander Yakovlev, "On the Conditions for Gate-Level Speed-Independence of Asynchronous Circuits," ACM International Workshop on Timing Issues in Specification, Synthesis, and Analysis of Digital Systems, Malente, Germany, September 1993.

  95. Peter Vanbekbergen, Chantal Ykman-Couvreur, Bill Lin, Hugo De Man, "Generalizing Signal Transition Graphs for Modeling Mixed Asynchronous/Synchronous and Arbitration Behavior," International Workshop on Logic Synthesis, Lake Tahoe, CA, May 1993.

  96. Chantal Ykman-Couvreur, Peter Vanbekbergen, Bill Lin, "Concurrency Reduction Transformations on State Graphs for Asynchronous Circuit Synthesis," International Workshop on Logic Synthesis, Lake Tahoe, CA, May 1993.

  97. Bill Lin, Hugo De Man, "Low-Power Driven Technology Mapping under Timing Constraints," International Workshop on Logic Synthesis, Lake Tahoe, CA, May 1993.

  98. Chantal Ykman-Couvreur, Bill Lin, Gert Goossens, Hugo De Man, "Synthesis and Optimization of Asynchronous Controllers Based on Extended Lock Graph Theory," European Conference on Design Automation, Paris, France, p. 512-517, February 1993.

  99. Bill Lin, "Synchronous Restructuring Algorithms for Optimizing Synchronous Circuits," IEEE Winter VLSI Workshop, Asilomar, CA, February 1993.

  100. Bill Lin, "Restructuring Synchronous Logic Circuitry," European Conference on Design Automation, Paris, France, p. 205-209, February 1993.

  101. Bill Lin, "Specification and Compilation of Asynchronous Interface Circuits," Dagstuhl Seminar, Dagstuhl, Germany, December 1992.

  102. Peter Vanbekbergen, Gert Goossens, Bill Lin, Hugo De Man, "A Generalised State Assignment Theory for Transformations on Signal Transition Graphs," IEEE International Conference on Computer-Aided Design, Santa Clara, CA, p. 112-117, November 1992.

  103. Mark Beardslee, Bill Lin, Alberto Sangiovanni-Vincentelli, "Communication Complexity Based Logic Partitioning," European Design Automation Conference (EuroDAC), Hamburg, Germany, September 1992.

  104. Bill Lin, "Specification and Compilation of Asynchronous Interface Circuits," ACiD-WG Workshop on Asynchronous Interfacing, Leuven, Belgium, September 1992.

  105. Bill Lin, Olivier Coudert, Jean Christophe Madre, "Symbolic Prime Generation for Multiple-Valued Functions," ACM/IEEE Design Automation Conference, p. 40-44, June 1992.

  106. Bill Lin, A. Richard Newton, "Implicit Manipulation of Equivalence Classes using Binary Decision Diagrams," International Conference on Computer Design, Cambridge, MA, October 1991.

  107. Bill Lin, A. Richard Newton, "Exact Removal of Redundant State Registers using Binary Decision Diagrams," Proceedings of the IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration, Edinburgh, Scotland, p. 277-286, August 1991.

  108. Bill Lin, A. Richard Newton, "Implicit Manipulation of Equivalence Classes using Binary Decision Diagrams," International Workshop on Logic Synthesis, Raleigh, NC, May 1991.

  109. Bill Lin, A. Richard Newton, "Exact Removal of Redundant State Registers using Binary Decision Diagrams," International Workshop on Logic Synthesis, Raleigh, NC, May 1991.

  110. Bill Lin A. Richard Newton, "Efficient Symbolic Manipulation of Equivalence Relations and Classes," International Workshop on Formal Methods in VLSI Design, Miami, FL, January 1991.

  111. Herve J. Touati, Hamid Savoj, Bill Lin, Robert K. Brayton, A. Sangiovanni-Vincentelli, "Implicit State Enumeration of Finite State Machines Using BDD's," IEEE International Conference on Computer-Aided Design, Santa Clara, CA, p. 130-133, November 1990.

  112. Bill Lin, Herve J. Touati, A. Richard Newton, "Don't Care Minimization of Multi-Level Sequential Logic Networks," IEEE International Conference on Computer-Aided Design, Santa Clara, CA, p. 414-417, November 1990.

  113. Bill Lin, Fabio Somenzi, "Minimization of Symbolic Relations," IEEE International Conference on Computer-Aided Design (Distinguished Paper Citation), Santa Clara, CA, p. 88-91, November 1990.

  114. Bill Lin, Gregory S. Whitcomb, A. Richard Newton, "Symbolic Don't Cares and Equivalence in High-Level Synthesis," Proceedings of the IFIP TC 10/WG 10.5 International Working Conference on Logic and Architectural Synthesis, Paris, France, May 1990.

  115. Bill Lin, A. Richard Newton, "A Generalized Approach to the Constrained Cubical Embedding Problem," International Conference on Computer Design, Cambridge, Massachusetts, p. 400-403, October 1989.

  116. Bill Lin, A. Richard Newton, "Synthesis of Multiple Level Logic from Symbolic High-Level Description Languages," Proceedings of the IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration (Distinguished Paper Citation), Federal Republic of Germany, p. 187-196, August 1989.

  117. Cho W. Moon, Bill Lin, Hamid Savoj, Robert K. Brayton, "Technology Mapping for Sequential Logic Synthesis," International Workshop on Logic Synthesis, Raleigh, NC, May 1989.

  118. Bill Lin, A. Richard Newton, "Restructuring State Machine and State Assignment: Relationship to Minimizing Logic Across Latch Boundaries," International Workshop on Logic Synthesis, Raleigh, NC, May 1989.

  119. Bill Lin, A. Richard Newton, "KAHLUA: A Hierarchical Circuit Disassembler," ACM/IEEE Design Automation Conference (Best Paper Award), Miami, Florida, p. 311-317, June 1987.

Book Chapters

  1. Shan Yan, Bill Lin, "Design of Application-Specific 3D Networks-on-Chip Architectures," In collection entitled 3D Integration for NoC-based SoC Architectures (Integrated Circuits and Systems), Springer, December 2010. Editors. A. Sheibanyrad, F. Petrot and A. Jantsch. [paper]

  2. Hugo De Man, Ivo Bolsens, Bill Lin, Karl Van Rompaey, Steven Vercauteren, Diederik Verkest, "Co-Design of DSP Systems," In collection entitled Hardware/Software Codesign, Kluwer Academic Publishing, January 1996. Editor. G. De Micheli.

  3. Tilman Kolks, Bill Lin, Hugo De Man, "Sizing of Communication Buffers for Communicating Signal Processors," In collection entitled VLSI Signal Processing VI, p. 426-434, IEEE Press, New York. 1993. Editors L.Eggermont, P.Dewilde, E.Deprettere, and J.van Meerbergen.

  4. Bill Lin, A. Richard Newton, "Exact Removal of Redundant State Registers using Binary Decision Diagrams," In collection entitled Very Large Scale Integration. Elsevier Science Publishers B.V. and North Holland Press. 1992. Editors A. Halass and P. Denyer.

  5. Bill Lin, Gregory S. Whitcomb, A. Richard Newton, "Symbolic Don't Cares and Equivalence in High-Level Synthesis," In collection entitled Logic and Architectural Synthesis. Elsevier Science Publishers B.V. and North Holland Press. 1991. Editors P. Michel and G. Saucier.

  6. Bill Lin, A. Richard Newton, "Synthesis of Multiple Level Logic from Symbolic High-Level Description Languages," In collection entitlted Very Large Scale Integration. Elsevier Science Publishers B.V. and North Holland Press. 1990. Editors G. Musgrave and U. Lauther.

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